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Low Power Digital CMOS Design Anantha P. Chandrakasan 1995 edition
Low Power Digital CMOS Design
Anantha P. Chandrakasan
Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation.
409 pages, biography
| Media | Books Hardcover Book (Book with hard spine and cover) |
| Released | June 30, 1995 |
| ISBN13 | 9780792395768 |
| Publishers | Springer |
| Pages | 409 |
| Dimensions | 155 × 235 × 23 mm · 771 g |
| Language | English |
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