Direct Transistor-Level Layout for Digital Blocks - Prakash Gopalakrishnan - Books - Springer-Verlag New York Inc. - 9781402076657 - June 17, 2004
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Prakash Gopalakrishnan
Direct Transistor-Level Layout for Digital Blocks 2004 edition

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The approach described in this book can pack devices much more densely than a typical cell-based layout. Direct Transistor-Level Layout For Digital Blocks is a comprehensive reference work on device-level layout optimization, which will be valuable to CAD tool and circuit designers.

125 pages, 38 black & white illustrations, biography

Media Books     Hardcover Book   (Book with hard spine and cover)
Released June 17, 2004
ISBN13 9781402076657
Publishers Springer-Verlag New York Inc.
Pages 125
Dimensions 156 × 232 × 9 mm   ·   367 g
Language English  

See all of Prakash Gopalakrishnan ( e.g. Hardcover Book and Paperback Book )